74hc595 drive led dot matrix principle and 74HC595 application in 8x8LED dot matrix

How does the 74HC595 work?

There is only one shift register , but there are 1+8, a total of 9 latches. The first latch can be understood as a relay pre-latch, which is not connected to Q0-Q7, and the next eight latches are connected to Q0-Q7.

When the first SCK and LCK, the shift register = the first bit of data, the pre-latch = the first bit of data. However, it did not enter the latch corresponding to Q0-Q7. Q0 to Q7=NON.

In the second SCK and LCK, the shift register = the second bit of data, the pre-latch = the second bit of data. At the same time, the pre-latch updates the previous first bit data to the corresponding latch of Q0. At this time, Q0 = the first bit. Q1 to Q7=NON.

In the third SCK and LCK, the shift register = the third bit of data, the pre-latch = the third bit of data. At the same time, the pre-latch updates the previous 2nd bit data to the corresponding latch of Q0. Q0 gives the previous 1st bit data to Q1, and Q0=the 2nd bit. Q1 = first place. Q2 to Q7=NON.

After 8 cycles (after giving 8 SCKs and 8 LCKs), the shift register = the 8th bit of data, the pre-latch = the 8th bit of data. However, Q0-Q6 corresponds to the 7th bit to the 1st bit data respectively, and the 8th bit data is not updated to Q0, and Q7=NON.

This is why the program that loops 8 times is always unable to display the 8th bit of data.

Therefore, to display all 8 bits, you need to give SCK and LCK more.

Then the question came, and finally gave this SCK and LCK all 8 bits. However, the 9th bit of useless data other than 8 bits is locked in the shift register and the pre-latch.

Then we can use SCLR (10 feet).

It is ok to give SCLR a falling edge. This falling edge clears both the shift register and the pre-latch. But it does not take effect immediately! Only takes effect when the next SCK is generated.

Therefore, in SCLR, the pre-latch and Q0-Q7 latch still lock the original data, and will not change the output until the next SCK.

When we send a new 8-bit data next time, the new data will be received after the SCLR takes effect at the first SCK, because it will not affect the reception of new data.

This process I call "close the mouth".

Application of 74HC595 in [8x8LED dot matrix]

Each lamp is equivalent to a point in the graph, with a unique unique coordinate position, so that the signal of the pin can be used to control the closing and opening of each lamp.

The col pin is connected to the eight pins of P0, and the row pin is connected to the eight-bit parallel output of the 595.

In the experiment, the column-by-column display is adopted. The column display of each column of eight columns is controlled by P0, and the LED lamp to be lit in each column is controlled by the 595 shift buffer.

The 74HC595 is a serial-in and out-shift register with a latch function. In terms of image, 14-pin is a porter, 11 is a factory goalkeeper, 12 is a factory goalkeeper, and 11 is a rising edge. Data, when repeating the 12-pin rising edge eight times in total, the previous eight-bit data is output from the 1 to 7 pin OE as the enable terminal, and the low level makes the output valid.