Apple's iPhone 8, 8 Plus, and X smartphones captured widespread attention when they were released. These latest models continue to feature an ultra-thin design while incorporating a range of new technologies. Behind this sleek look lies the adoption of advanced packaging solutions, including System-in-Package (SiP) technology. This technology was already used in the iPhone 7 and Apple Watch, and it is now expected to play a key role in future Apple devices.
So, what exactly is SiP? It’s a packaging technique that integrates multiple functional chips—such as processors, memory, and RF components—into a single package, forming a complete subsystem. Unlike SoC (System-on-Chip), which is a highly integrated single chip, SiP combines different chips in a side-by-side or stacked configuration. This allows for greater flexibility and can include various active and passive components like CMOS-based parts, GaAs, GaN, and MEMS devices. As smartphones become smaller and more powerful, SiP has emerged as a critical solution for achieving higher integration.
The structure of SiP can be either 2D or 3D. While 2D packaging places components side by side, 3D stacking allows for more layers, increasing the number of chips that can be included in a compact space. Internal connections can be made using wire bonding, flip-chip technology, or a combination of both. In addition to these structures, SiP can also integrate multiple functions into a single substrate, offering even more customization options.
From the disassembly of the iPhone 7, we saw that Apple had already adopted SiP and WLCSP (Wafer-Level Chip Scale Packaging). For example, Avago and Skyworks used SiP for their power amplifiers. With the push toward miniaturization, the use of SiP is growing rapidly. Industry analysts predict that the global advanced packaging market will grow at a 7% CAGR from 2015 to 2020, with China’s market reaching $4 billion by 2020.
Several factors are driving the growth of SiP technology:
1. Miniaturization of component size and height
2. Integration of RF, analog, and storage components
3. Support for different process wafers and chips
4. Improved signal integrity and reduced power consumption
5. Flexibility and reconfigurability in system design
6. Reduction in BOM costs and PCB complexity
7. Faster time-to-market through simplified design
8. Better performance in high-frequency applications
9. Compatibility with a wide range of components, including sensors and optical modules
Beyond Moore’s Law, SiP offers an alternative path for innovation. While SoC continues to follow traditional scaling, SiP focuses on system-level integration, enabling better performance and efficiency without relying solely on shrinking transistors. This makes it ideal for applications like wearables, healthcare devices, and IoT systems.
Today, leading packaging companies are investing heavily in SiP. Amkor Technology, for instance, reported $725 million in revenue from SiP in 2015, with a 16% annual growth rate. The benefits of SiP are clear: improved efficiency, lower costs, and enhanced performance.
Despite its advantages, SiP still faces challenges, such as complex collaboration between system designers, chip manufacturers, and packaging houses. To foster better communication, the first-ever SiP conference in China was held on October 19–20, 2017, at the Hilton Nanhai Hotel in Shekou, Shenzhen. This event aimed to bring together industry leaders to discuss the future of SiP and its role in shaping next-generation electronics.
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