Two months ago, I attended the Imagination Summit in Japan for the first time and was preparing to return home after the event. While waiting at the airport to board my flight back to the UK, I saw a Nissan Motors billboard that read, "What if the man who ran the fastest in the world could be faster?" It made me think—this is an intriguing question.
A few weeks later, I received an email from the engineering team informing me that the MIPS P5600 had topped the CoreMark rankings with an impressive 5.6 CoreMark/MHz per CPU score. This wasn’t just a one-off success—it marked a significant leap in performance efficiency.
The world’s fastest single-threaded CPU is now even faster! The performance boost isn’t accidental. Just like Nissan, we’ve always aimed for perfection, even when we’re already leading the industry. The P5600 has officially become the new champion in CoreMark, breaking the record previously set by our award-winning MIPS proAptiv processor.
This achievement has been verified by EEMBC, the leading organization responsible for designing and maintaining the CoreMark benchmark. You can find all certified results on their official website.
Upon closer inspection, we found that the MIPS P5600 delivers up to 20% better performance than its direct competitors while occupying significantly less space. This is a game-changer for power-sensitive applications such as mobile devices, home entertainment systems, networking equipment, and automotive solutions.
The P5600 not only outperforms many high-end CPUs but also surpasses Intel's desktop processors in terms of CoreMark/MHz efficiency. For instance, the Intel Core i7-2640M achieves around 14,513.79 CoreMark at 2.8 GHz, which equates to about 5.18 CoreMark/MHz—roughly 10% lower than the latest result from the P5600.
Among all licensable CPUs, the MIPS P5600 holds the highest and most proven CoreMark score. This level of performance and efficiency will drive innovation across a wide range of applications where power and size are critical factors.
Importantly, these results were achieved using both the latest and existing GCC compilers. Whether it's partner source code or Imagination’s SDK, all customers have access to this powerful toolchain. Unlike some competitors who rely on expensive, closed-source tools, Imagination focuses on building an open ecosystem that accelerates development and reduces time-to-market for embedded and mobile applications.
Introducing the MIPS P5600
The P5600 is part of the MIPS Warrior P-class family, designed to deliver top-tier performance for mobile and embedded applications. It features a powerful and feature-rich microarchitecture, making it ideal for high-performance computing tasks.
Based on the MIPS Architecture Release 5, the P5600 includes several key enhancements:
- Fast 128-bit SIMD engine: Optimizes multimedia processing and other matrix-based operations.
- Full hardware virtualization support: Enables multiple independent operating systems to run simultaneously.
- Enhanced security features: Supports multiple Trusted Execution Environments (TEEs) on a single CPU.
- Advanced branch prediction and TLB page table hardware: Ensures optimal performance and efficient instruction execution.
- Instruction bonding: Doubles performance for memory-intensive tasks.
- Enhanced Virtual Addressing (EVA): Provides more flexible memory usage.
- Extended Physical Addressing (XPA): Supports up to 1TB of memory (40 bits).
This high-end 32-bit CPU is also part of our third-generation multi-issue, out-of-order, fully synthesizable processors. Below is a visual representation of the long-term evolution of high-performance MIPS CPUs, from the 74K and proAptiv to the current P5600.

The P5600 builds upon the previous generation of proAptiv CPUs with improvements such as enhanced extraction efficiency, reduced L2 cache latency, and improved pre-fetching capabilities. Cache replay and memory disambiguation have also been optimized to boost real-world performance, particularly in memory-intensive scenarios.

We are proud of the groundbreaking performance of the new MIPS Warrior CPU. This achievement stems from years of focused design and innovation. Looking ahead, the evolution of the instruction set architecture (such as Release 6), along with continuous improvements in memory subsystems and microarchitecture, will ensure the P5600 remains at the forefront of performance.

By combining MIPS Warrior CPUs, PowerVR Multimedia IP, and Ensigma Connectivity IP, system engineers can create cutting-edge embedded processors that deliver exceptional performance with lower power consumption and a smaller footprint.
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