1. Introduction
In recent years, the field of embedded development has experienced rapid growth, and traditional event-triggered programming methods using the 51-chip's polling loop have become increasingly inadequate for meeting the demands of enterprise-level stability and security. Modern embedded systems now incorporate operating systems such as VxWorks, Linux, WinCE, and μC/OS-II. However, due to cost and technical constraints, microcontrollers often do not support these complex OSs. In practical applications, systems frequently need to manage multiple peripherals and tasks simultaneously, making efficient task scheduling essential. This is where time-triggered embedded systems shine—offering a simple yet powerful solution.
This paper presents the design and implementation of a time-triggered multi-task scheduler based on the AVR microcontroller. The system uses messages to trigger context switches between different tasks and devices, enabling more predictable and reliable operation.
2. Structure Characteristics of the AVR Microcontroller
The AVR series, exemplified by the ATmega128, is widely used in embedded applications. It features a Harvard architecture, a RISC instruction set, low power consumption, and rich on-chip resources. These characteristics significantly reduce the complexity of peripheral circuits, resulting in a more stable and reliable system. The robust hardware foundation provided by the AVR microcontroller makes it an ideal platform for embedded system design.
3. Comparison of Two Embedded Trigger Modes
Embedded systems typically use two distinct scheduling approaches: event-triggered and time-triggered. Event-triggered systems rely on interrupt-driven mechanisms, where events occur at unpredictable times. In contrast, time-triggered systems are driven by a global clock, ensuring that system behavior is predictable in both function and timing.
3.1 Issues with Event-Triggered Systems
A common misconception among developers is that interrupt events will never be lost, which can lead to serious issues in real-world applications. In practice, interrupt loss is a frequent problem. External factors include signal instability or excessive interrupt frequency, while internal causes may stem from hardware limitations or improper software configuration. For example, if a high-priority interrupt service routine (ISR) is not interrupted by a lower-priority one, the latter may be delayed or even ignored, leading to missed responses.
When multiple interrupts occur at random intervals, the system may fail to respond properly. Handling all possible combinations of simultaneous interrupts is extremely challenging, increasing system complexity and reducing predictability. According to Metzner’s research, an event-triggered system with 27 tasks and the RM scheduling algorithm only achieves a CPU utilization rate of 18%, highlighting its inefficiency.
3.2 Advantages of Time-Triggered Systems
Time-triggered systems offer a more controlled and predictable approach. By carefully arranging the order of task execution, designers can ensure that only one event is processed at a time. This predictability makes them ideal for safety-critical applications. Kopetz proposed that using a time-triggered cooperative scheduler improves reliability and reduces CPU and memory usage, making it a preferred choice for many embedded systems.
4. Design of a Time-Triggered Embedded System
The scheduler in this system separates timer settings from the compiler's data types and processor bit width, making it highly portable across different hardware platforms. The overall system block diagram is shown in Figure 1:
4.1 Message Queueing
Message queueing is the core of the scheduler. It is a user-defined data type that stores the necessary information for each task, allowing quick access. For a time-triggered hybrid scheduler, the data structure used results in a minimal memory overhead—only 8 bytes per task on a 16-bit processor and 14 bytes on a 32-bit system.
4.2 Scheduler Timer Initialization Function
This function sets up a timing reference to drive the scheduler. The ATmega128 microcontroller, selected for this project, includes four timers (two 8-bit and two 16-bit), any of which can be used for this purpose.
Void SCH_Init_T0(void) { Delete each task one by one; Stop timer 0; Set time size function; Enable timer 0 mode; Start timer 0; }
Note: During initialization, global interrupts must be disabled. For example, using SREG = 0x80 or SEI();. The scheduler must first define a default time slice, which is critical for performance. If the time slice is too large, the system may not respond quickly enough to interactive events. Conversely, if it's too small, the scheduler's overhead increases, and tasks may run for too short a time.
Based on experience, a suitable time slice is slightly longer than the typical interaction time, allowing most tasks to complete within a single time slice. After testing, a time slice between 1 and 5 ms is generally optimal, balancing response speed and task execution efficiency. The exact value depends on the number of tasks and their execution duration.
4.3 Interrupt Service Routine
It is recommended to activate this function using CTC mode. When a task needs to run, it enters a ready state and waits for execution. The content of the ISR varies depending on the specific task.
4.4 Scheduler Task Add Function
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