High current hot swap application with TPS2393A

Abstract

The TPS2393A is a hot-swap controller optimized for -48V systems. It is widely used in various applications due to its powerful features such as wide input power range, programmable current limit, UV/OV protection, insertion detection, power good indication, and alarm functionality. The device also provides load current slew rate control, which helps manage surge loads and ensures peak current limiting. Under normal conditions, the actual rated load current is always below the safety margin threshold. However, in some cases, the application may require a higher rated current, which can stress the FET used for inrush current control.

Introduction

The TPS2393A is a full-featured -48V hot-swap power management IC. Like most hot-swap controllers, it uses an external N-channel power FET and a low-value current-sense resistor to control the load power-up process. Figure 1 shows a block diagram of the circuit. The reference voltage is applied to the non-inverting input of a linear power amplifier (LCA), while the load information is provided through the voltage drop across the sense resistor RSNS at the inverting input. The LCA then controls the FET gate to limit the load current to the reference value. VREF is set to 40mV, allowing the maximum load current to be calculated based on this reference.

The value obtained is IMAX, representing the maximum load current.

Figure 1: TPS2393 Current Control Loop

Figure 2: Ramp Generator Module

Figure 3 shows a typical hot-swap configuration, while Figure 4 illustrates the waveform of a 2A current limit.

Figure 3: Typical Hot-Swap Diagram

Figure 4: TPS2393 Waveform

Please note:

VOUT is actually the VDRAIN of the FET. At T=0, VDS is approximately 48V; when the FET turns on, it drops close to zero. Contact flickering indicates hot plug or board insertion events. This is why the left side of the VDS is 0 (the board is not powered). After insertion, the voltage swings up to 48V, and the gate begins switching, allowing current to flow into the board, during which VDS decreases as IDS increases.

How to Achieve Heavy Load Hot Swap

To avoid exceeding the safe operating area (SOA) curve of the FET, the maximum current must be limited during inrush. For example, if the initial charging current for bulk capacitors is 2A (40mV/20mΩ), the actual load current must stay below that. However, in some applications, the load current can go up to 50A, requiring a very low RSNS to allow higher current limits. This makes FET selection challenging, especially with high IMAX values.

Figure 5: Different Ideal Current Waveforms Required

Assuming a normal load current of 10A and considering thermal rise, we should choose an appropriate RDSOn. For instance, selecting FDB047N10 with Rdson = 4.7mΩ and Rθja = 62.5°C/W, the junction temperature calculation under TA = 40°C is as follows:

In steady state, there’s no issue with heat dissipation. However, the SOA map must be considered to ensure the FET can handle transient power during startup.

Figure 6 shows the typical SOA for the FDB047N10. Under 25°C shell temperature and 48V input, 10A constant current should last less than 1ms, but 2A can run for about 10ms. A trade-off between reliability and charging time is needed to choose the right current level.

Figure 6: FDB047N10 SOA Curve

A simple solution to meet high-output current hot-swap requirements is to isolate the LCA current limit from the overcurrent (OC) limit. However, both are integrated in the TPS2393A.

After reviewing the product manual, we find that the /PG pin goes low when two conditions are met: DRAINSNS voltage is below 1.35V, and IRAMP voltage is above 5V. This allows us to use the /PG signal to adjust the bypass FET current level. Figure 7 shows a simplified schematic view.

Figure 7: Adding Bias Current to Change Actual Load

Since ISENS is the negative side of the LCA (controlled at 40mV), we can derive the following equation:

Io simplifies to:

In Figure 6, with R1=R2=470kΩ, R3=680Ω, and R4=4mΩ, the actual load current Io ≈ 1.3A. From the SOA curve (yellow dotted line), the maximum SOA time for 1.3A is around 100ms.

With CLoad = 100μF, the minimum charging time is:

The TPS2393A also allows programming the "surge slew rate" via a capacitor on the IRAMP pin, which increases the charging time. Since the charging time is less than the maximum SOA time, the FET is suitable for the design.

The TPS2393A also includes a programmable "fault timer" to protect the FET. Based on previous analysis, the fault time can be set between 3.7ms and 100ms. The timer capacitor can be calculated using the following equation:

Figure 7 shows the startup waveform, tested on the EVM board.

Figure 8: Bias Current Start

When the startup process completes, the /PG signal goes low. The bias current through R2 becomes negligible, and the maximum load current rises to:

Since R1 is directly connected to the bus voltage, the bias current varies with it. If the bus has a wide voltage range, an external circuit can provide a fixed reference to R1, ensuring a stable bias current.

Conclusion

Although the TPS2393A has a relatively low current limit, it can support more applications if the steady-state load current exceeds the startup charging current. This article presents a method to adjust the current limit at different stages of operation—from ramp-up to stability.

References

1. TI SLUS536C "TPS2393A Product Manual"

2. "Using the TPS2393 -48V ATCA module hot swap", Author: Jim Bird, TI SLUA318

3. "Full Featured -48V Hot Swap Power Manager (TPS2392 and TPS2393)", Author: Andy Ripanti, TI

4. "Using TPS2490/91 hot-swap FET transient heat dissipation design and response", by: Martin Patoka, TI

5. "FDB047N10 Product Manual", Fairchild Semiconductor Corporation